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CMOS Inverter
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1)The maximum and minimum logic levels of a static CMOS inverter depends on 
  
2)Which of the following statement is NOT TRUE for a CMOS inverter? 
  
3)If the pMOS transistor size is increased with respect to the nMOS size, what happen to the tpLH of the inverter? 
  
4)What happens to delay if you increase load capacitance?
  
5)Which of the following is TRUE at the switching threshold of a static CMOS inverter?
  

  


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